/media/sda-magnetic/david/Dok-15-2023-11-27/informatik/vhdl-2023-12-08/quine0044b.vhdl

library ieee;
use ieee.std_logic_1164.all;

entity meinschaltnetz044 is
port
(
    x3, x2, x1, x0: in std_logic;
    y: out std_logic
);
end;

architecture verhalten of meinschaltnetz044 is
begin
        y <= (x1 and x0) or
        (x2 and not x1 and not x0) or
        (not x3 and not x2 and x0) or
        (not x3 and x2 and not x0) or
        (x3 and not x2 and not x0);
end;

library ieee;
use ieee.std_loc_1164.all;

entity testbench0044 is
port
(
    y: out std_logic
);
end;


architecture verhalten of testbench0044 is
    component meinschaltnetz044
    port
    (
        x3, x2, x1, x0: in std_logic;
        y: out std_logic
    );
    end;
    signal x3, x2, x1, x0: std_logic;
begin
    x0 <= '0' after 0 ns, '1' after 10 ns, '0' after 20 ns, '1' after 30 ns, '0' after 40 ns, '1' after 50 ns, '0' after 60 ns, '1' after 70 ns, '0' after 80 ns, '1' after 90 ns, '0' after 100 ns, '1' after 110 ns, '0' after 120 ns, '1' after 130 ns, '0' after 140 ns, '1' after 150 ns;

    x1 <= '0' after 0 ns, '0' after 10 ns, '1' after 20 ns, '1' after 30 ns, '0' after 40 ns, '0' after 50 ns, '1' after 60 ns, '1' after 70 ns, '0' after 80 ns, '0' after 90 ns, '1' after 100 ns, '1' after 110 ns, '0' after 120 ns, '0' after 130 ns, '1' after 140 ns, '1' after 150 ns;

    x2 <= '0' after 0 ns, '0' after 10 ns, '0' after 20 ns, '0' after 30 ns, '1' after 40 ns, '1' after 50 ns, '1' after 60 ns, '1' after 70 ns, '0' after 80 ns, '0' after 90 ns, '0' after 100 ns, '0' after 110 ns, '1' after 120 ns, '1' after 130 ns, '1' after 140 ns, '1' after 150 ns;

    x3 <= '0' after 0 ns, '0' after 10 ns, '0' after 20 ns, '0' after 30 ns, '0' after 40 ns, '0' after 50 ns, '0' after 60 ns, '0' after 70 ns, '1' after 80 ns, '1' after 90 ns, '1' after 100 ns, '1' after 110 ns, '1' after 120 ns, '1' after 130 ns, '1' after 140 ns, '1' after 150 ns;
end;